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PDF AZ4052 Fiche technique - BCD Semiconductor

Numéro de référence AZ4052
Description Dual 4-channel Analog Multiplexer/Demultiplexer
Fabricant BCD Semiconductor 
Logo BCD Semiconductor Logo 



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AZ4052 Datasheet, Description
Preliminary Datasheet
Dual 4-channel Analog Multiplexer/Demultiplexer
AZ4052
General Description
The AZ4052 is high-speed si-gate CMOS device. The
AZ4052 is dual 4-channel analog multiplexers or
demultiplexers with common select logic. Each
multiplexer has four independent inputs/outputs (pins
nY0 to nY3) and a common input/output (pin nZ).
The common channel select logics include two digital
select inputs (pins S0 and S1) and an active LOW
___ ___
enable input (pin E). When pin E=LOW, one of the
four switches is selected (Low-impedance On-state)
___
with pins S0 and S1. When pin E =HIGH, all
switches are in the high-impedance Off-state,
independent of pins S0 and S1. VCC and GND are the
supply voltage pins for the digital control inputs (pins
___
S0, S1 and E). The VCC to GND ranges are 3.0V to
10V. The analog inputs/outputs (pins nY0 to nY3 and
nZ) can swing between VCC as a positive limit and
VEE as a negative limit. VCC-VEE may not exceed 10V.
For operation as a digital multiplexer/demultiplexer,
VEE is connected to GND (Typically Ground).
The AZ4052 is available in standard packages of
SOIC-16 and DIP-16.
Features
• Wide Operation Voltage: ±5.0V or 10V
• Low On-resistance:
- 55Ω (Typ.) at VCC-VEE=5V
- 40Ω ( Typ.) at VCC-VEE=10V
• Ultra Low THD+N:
0.003% @ 10V, 0.008% @ 5.0V
• Ultra Low Crosstalk: -120dB
• Ultra Low Noise: 6.0μVRMS
• Operating Temperature: -40ºC to 85ºC
Applications
• LCD TV/PDP TV/CRT TV
4:1 Multi-channel Signal Selecting
Function Table
Control Input
___
E
S1
S0
LL
L
LL
H
LH
L
LH
H
HX
X
On Channel
nY0
nY1
nY2
nY3
None
nZ
nZ
nZ
nZ
SOIC-16
DIP-16
Figure 1. Package Types of AZ4052
Oct. 2011 Rev. 1.1
BCD Semiconductor Manufacturing Limited
1
AZ4052 Fiche technique
Preliminary Datasheet
Dual 4-channel Analog Multiplexer/Demultiplexer
AZ4052
Functional Block Diagram
Figure 3. Functional Block Diagram of AZ4052
Schematic Diagram (One Switch)
Oct. 2011 Rev. 1. 1
Figure 4. Schematic Diagram of AZ4052
BCD Semiconductor Manufacturing Limited
3

3 Page

AZ4052 pdf
Preliminary Datasheet
Dual 4-channel Analog Multiplexer/Demultiplexer
AZ4052
Recommended Operating Conditions
Parameter
Symbol
Supply Voltage
VIN
Logic Input Voltage
Switch Signal Input/
Output Voltage
Operating Ambient
Temperature Range
Input Rise and Fall
Time
VI
VIS/VOS
TA
tr, tf
Condition
VCC-GND
VCC-VEE
VCC=5.0V
VCC=10V
Min
3.0
3.0
VEE
VEE
-40
Typ Max Unit
10 V
10
VCC
V
VCC
V
85 ºC
6.0 400
ns
6.0 250
Electrical Characteristics
DC Characteristics
VIS is the input voltage at pins nYn or nZ, whichever is assigned as an input; VOS is the output voltage at pins nZ
or nYn, whichever is assigned as an output, voltages are referenced to GND (Ground=0V).
Parameter
High-level
Input Voltage
Symbol
VIH
Low-level
Input Voltage
VIL
Other
Conditions
VCC(V)
5.0
10
5.0
10
Input Leakage
Current
Analog Switch
Off-state
Current
Analog Switch
On-state
Current
Quiescent
Supply
Current
ILI
IS (Off)
IS (On)
ICC
VI=VCC or GND
VI=VIH or VIL,
VS=VCC-VEE
(Figure 5)
Per Channel
All Channels
VI=VIH or VIL,
VS=VCC-VEE
(Figure 6)
VI=VCC or GND,
VIS=VEE or VCC,
VOS=VCC or VEE
5.0
10
5.0
10
10
10
5.0
10
VEE(V)
0
0
0
0
0
0
0
Min
2.8
6.0
Typ Max Unit
V
1.5
V
3.0
±1.0 μA
±1.0 μA
±1.0 μA
±1.0 μA
±2.0 μA
±2.0 μA
50 160 μA
100 320 μA
Oct. 2011 Rev. 1. 1
BCD Semiconductor Manufacturing Limited
6

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