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PDF S25FL116K Fiche technique - Cypress Semiconductor

Numéro de référence S25FL116K
Description 3.0V SPI Flash Memory
Fabricant Cypress Semiconductor 
Logo Cypress Semiconductor Logo 



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S25FL116K Datasheet, Description
S25FL116K, S25FL132K, S25FL164K
16 Mbit (2 Mbyte), 32 Mbit (4 Mbyte),
64 Mbit (8 Mbyte) 3.0V SPI Flash Memory
Features
Serial Peripheral Interface (SPI) with Multi-I/O
– SPI Clock polarity and phase modes 0 and 3
– Command subset and footprint compatible with S25FL-K
Read
– Normal Read (Serial):
– 50 MHz clock rate (40 °C to +85 °C/105 °C)
– 45 MHz clock rate (40 °C to +125 °C)
– Fast Read (Serial):
– 108 MHz clock rate (40 °C to +85 °C/105 °C)
– 97 MHz clock rate (40 °C to +125 °C)
– Dual Read:
– 108 MHz clock rate (40 °C to +85 °C/105 °C)
– 97 MHz clock rate (40 °C to +125 °C)
– Quad Read:
– 108 MHz clock rate (40 °C to +85 °C/105 °C)
– 97 MHz clock rate for S25FL164K (40 °C to +125 °C)
– 54 MB/s maximum continuous data transfer rate
(40 °C to +85 °C/105 °C)
– Efficient Execute-In-Place (XIP)
– Continuous and wrapped read modes
– Serial Flash Discoverable Parameters (SFDP)
Program
– Serial-input Page Program (up to 256 bytes)
– Program Suspend and Resume
Erase
– Uniform sector erase (4 kB)
– Uniform block erase (64 kB)
– Chip erase
– Erase Suspend and Resume
Cycling Endurance
– 100K Program-Erase cycles on any sector
Data Retention
– 20-year data retention
Security
– Three 256-byte Security Registers with OTP protection
– Low supply voltage protection of the entire memory
– Pointer-based security protection feature (S25FL132K and
S25FL164K)
– Top / Bottom relative Block Protection Range, 4 kB to all of
memory
– 8-Byte Unique ID for each device
– Non-volatile Status Register bits control protection modes
– Software command protection
– Hardware input signal protection
– Lock-Down until power cycle protection
– OTP protection of security registers
90 nm Floating Gate Technology
Single Supply Voltage
– 2.7 V to 3.6 V (Industrial, Industrial Plus, and Extended
temperature range)
– 2.6 V to 3.6 V (Extended temperature range)
Temperature Ranges
– Industrial (40 °C to +85 °C)
– Industrial Plus (40 °C to +105 °C)
– Extended (40 °C to +125 °C)
– Industrial, GT Grade, AEC-Q100 Grade 3 (40 °C to +85 °C)
– Industrial Plus, GT Grade, AEC-Q100 Grade 2(40 °C to +105 °C)
– Extended, GT Grade, AEC-Q100 Grade 1 (40 °C to +125 °C)
Package Options
– S25FL116K
– 8-lead SOIC (150 mil) – SOA008
– 8-lead SOIC (208 mil) – SOC008
– 8-contact WSON 5 mm x 6 mm – WND008
– 24-ball BGA 6 mm 8 mm – FAB024 and FAC024
– KGD / KGW
– S25FL132K
– 8-lead SOIC (150 mil) – SOA008
– 8-lead SOIC (208 mil) – SOC008
– 8-contact USON 4 mm 4 mm – UNF008
– 8-contact WSON 5 mm 6 mm – WND008
– 24-ball BGA 6 mm 8 mm – FAB024 and FAC024
– KGD / KGW
– S25FL164K
– 8-lead SOIC (208 mil) – SOC008
– 16-lead SOIC (300 mil) – SO3016
– 8-contact WSON 5 mm 6 mm – WND008
– 24-ball BGA 6 mm 8 mm – FAB024 and FAC024
– KGD / KGW
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 002-00497 Rev. *E
• San Jose, CA 95134-1709 • 408-943-2600
Revised June 29, 2016
S25FL116K Fiche technique
S25FL116K, S25FL132K, S25FL164K
Contents
1. General Description..................................................... 4
1.1 Migration Notes.............................................................. 5
1.2 Glossary......................................................................... 6
1.3 Other Resources............................................................ 7
Hardware Interface
2. Signal Descriptions ..................................................... 8
2.1 Input / Output Summary................................................. 8
2.2 Address and Data Configuration.................................... 9
2.3 Serial Clock (SCK) ......................................................... 9
2.4 Chip Select (CS#) .......................................................... 9
2.5 Serial Input (SI) / IO0 ..................................................... 9
2.6 Serial Output (SO) / IO1................................................. 9
2.7 Write Protect (WP#) / IO2 .............................................. 9
2.8 HOLD# / IO3 ................................................................ 10
2.9 Core and I/O Signal Voltage Supply (VCC) .................. 10
2.10 Supply and Signal Ground (VSS) ................................. 10
2.11 Not Connected (NC) .................................................... 10
2.12 Reserved for Future Use (RFU)................................... 10
2.13 Do Not Use (DNU) ....................................................... 11
2.14 Block Diagrams............................................................ 11
3. Signal Protocols......................................................... 12
3.1 SPI Clock Modes ......................................................... 12
3.2 Command Protocol ...................................................... 12
3.3 Interface States............................................................ 16
3.4 Status Register Effects on the Interface ...................... 19
3.5 Data Protection ............................................................ 19
4. Electrical Characteristics .......................................... 20
4.1 Absolute Maximum Ratings ......................................... 20
4.2 Thermal Resistance ..................................................... 21
4.3 Operating Ranges........................................................ 21
4.4 DC Electrical Characteristics ....................................... 22
4.5 AC Measurement Conditions ....................................... 23
4.6 Power-Up Timing ......................................................... 24
4.7 Power-On (Cold) Reset................................................ 25
4.8 AC Electrical Characteristics......................................... 25
5. Physical Interface ....................................................... 30
5.1 Connection Diagrams ................................................... 30
5.2 Physical Diagrams ........................................................ 32
Software Interface
6. Address Space Maps .................................................. 39
6.1 Overview....................................................................... 39
6.2 Flash Memory Array...................................................... 39
6.3 Security Registers......................................................... 40
6.4 Security Register 0 — Serial Flash
Discoverable Parameters
(SFDP — JEDEC JESD216B) ...................................... 40
6.5 Status Registers ........................................................... 50
6.6 Device Identification...................................................... 60
7. Functional Description ............................................... 61
7.1 SPI Operations ............................................................. 61
7.2 Write Protection ............................................................ 62
7.3 Status Registers ........................................................... 62
8. Commands .................................................................. 63
8.1 Configuration and Status Commands ........................... 65
8.2 Program and Erase Commands ................................... 68
8.3 Read Commands .......................................................... 71
8.4 Reset Commands ......................................................... 76
8.5 ID and Security Commands .......................................... 77
8.6 Set Block / Pointer Protection
(39h) — S25FL132K and S25FL164K.......................... 82
9. Data Integrity ............................................................... 84
9.1 Erase Endurance .......................................................... 84
9.2 Data Retention .............................................................. 84
9.3 Initial Delivery State ...................................................... 84
10. Ordering Information .................................................. 85
11. Revision History.......................................................... 89
Document Number: 002-00497 Rev. *E
Page 3 of 90

3 Page

S25FL116K pdf
S25FL116K, S25FL132K, S25FL164K
1.1.2.2
Commands Not Supported
The following S25FL-K and S25FL-P commands are not supported:
Quad Page PGM (32h)
Half-Block Erase 32K (52h)
Word read Quad I/O (E7)
Octal Word Read Quad I/O (E3h)
MFID dual I/O (92h)
MFID quad I/O (94h)
Read Unique ID (4Bh)
1.1.2.3
New Features
The S25FL1-K introduces new features to low density SPI category memories:
Variable read latency (number of dummy cycles) for faster initial access time or higher clock rate read commands
Industrial Plus and Extended temperature range
Volatile configuration option in addition to legacy non-volatile configuration
1.2 Glossary
Command. All information transferred between the host system and memory during one period while CS# is low. This includes
the instruction (sometimes called an operation code or opcode) and any required address, mode bits, latency cycles, or data.
Flash. The name for a type of Electrical Erase Programmable Read Only Memory (EEPROM) that erases large blocks of
memory bits in parallel, making the erase operation much faster than early EEPROM.
High. A signal voltage level VIH or a logic level representing a binary one (1).
Instruction. The 8-bit code indicating the function to be performed by a command (sometimes called an operation code or
opcode). The instruction is always the first 8 bits transferred from host system to the memory in any command.
Low. A signal voltage level VIL or a logic level representing a binary zero (0).
LSB. Least Significant Bit. Generally the right most bit, with the lowest order of magnitude value, within a group of bits of a
register or data value.
MSB. Most Significant Bit. Generally the left most bit, with the highest order of magnitude value, within a group of bits of a
register or data value.
Non-Volatile. No power is needed to maintain data stored in the memory.
OPN. Ordering Part Number. The alphanumeric string specifying the memory device type, density, package, factory non-volatile
configuration, etc. used to select the desired device.
Page. 256-byte aligned and length group of data.
PCB. Printed Circuit Board.
Register Bit References. Are in the format: Register_name[bit_number] or Register_name[bit_range_MSB: bit_range_LSB].
Sector. Erase unit size; all sectors are physically 4-kbytes aligned and length. Depending on the erase command used, groups
of physical sectors may be erased as a larger logical sector of 64 kbytes.
Write. An operation that changes data within volatile or non-volatile registers bits or non-volatile flash memory. When changing
non-volatile data, an erase and reprogramming of any unchanged non-volatile data is done, as part of the operation, such that
the non-volatile data is modified by the write operation, in the same way that volatile data is modified – as a single operation.
The non-volatile data appears to the host system to be updated by the single write command, without the need for separate
commands for erase and reprogram of adjacent, but unaffected data.
Document Number: 002-00497 Rev. *E
Page 6 of 90

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