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PDF MT6229 Fiche technique - MediaTek

Numéro de référence MT6229
Description GSM/GPRS/EDGE Baseband Processor
Fabricant MediaTek 
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MT6229 Datasheet, Description
MT6229 / MT6230 GSM/GPRS/EDGE Baseband Processor Data Sheet Revision 2.01
MT6229 / MT6230
GSM/GPRS/EDGE Baseband
Processor
Data Sheet
Revision 2.01
Nov 3, 2006
1/667
MediaTek Inc. Confidential
MT6229 Fiche technique
MT6229 / MT6230 GSM/GPRS/EDGE Baseband Processor Data Sheet Revision 2.01
TABLE OF CONTENTS
Revision History...................................................................................................................................... 2
1. System Overview............................................................................................................................... 5
1.1 Platform Features ....................................................................................................................................................... 8
1.2 MODEM Features.................................................................................................................................................... 10
1.3 Multi-Media Features................................................................................................................................................11
1.4 General Description ................................................................................................................................................. 14
2 Product Descriptions ...................................................................................................................... 16
2.1 Pin Outs.................................................................................................................................................................... 16
2.2 Top Marking Definition ........................................................................................................................................... 19
DC Characteristics............................................................................................................................................................. 19
DC Characteristics............................................................................................................................................................. 20
2.3 Pin Description......................................................................................................................................................... 21
3 Micro-Controller Unit Subsystem ................................................................................................. 35
3.1 Processor Core ......................................................................................................................................................... 36
3.2 Memory Management .............................................................................................................................................. 36
3.3 Bus System............................................................................................................................................................... 40
3.4 Direct Memory Access............................................................................................................................................. 43
3.5 Interrupt Controller .................................................................................................................................................. 61
3.6 Code Cache Controller............................................................................................................................................. 77
3.7 MPU......................................................................................................................................................................... 86
3.8 Data Cache ............................................................................................................................................................... 95
3.9 Internal Memory Interface ..................................................................................................................................... 105
3.10 External Memory Interface .................................................................................................................................... 105
4 Microcontroller Peripherals ........................................................................................................ 115
4.1 Pulse-Width Modulation Outputs............................................................................................................................115
4.2 Alerter .....................................................................................................................................................................118
4.3 SIM Interface ......................................................................................................................................................... 120
4.4 Keypad Scanner ..................................................................................................................................................... 130
4.5 General Purpose Inputs/Outputs ............................................................................................................................ 132
4.6 General Purpose Timer........................................................................................................................................... 148
4.7 UART..................................................................................................................................................................... 151
4.8 IrDA Framer........................................................................................................................................................... 166
4.9 Real Time Clock .................................................................................................................................................... 175
4.10 Auxiliary ADC Unit ............................................................................................................................................... 181
4.11 I2C / SCCB ............................................................................................................................................................ 184
4.12 Cipher Hash Engine (CHE).................................................................................................................................... 189
5 Microcontroller Coprocessors ..................................................................................................... 198
5.1 Divider ................................................................................................................................................................... 198
5.2 CSD Accelerator .................................................................................................................................................... 200
5.3 FCS Codec ............................................................................................................................................................. 212
5.4 PPP Framer Coprocessor (PFC)................................................................................................................................. 214
6 Multi-Media Subsystem ............................................................................................................... 219
6.1 LCD Interface ........................................................................................................................................................ 219
6.2 NAND FLASH interface ....................................................................................................................................... 241
6.3 USB OTG Controller ............................................................................................................................................. 258
6.4 Memory Stick and SD Memory Card Controller ................................................................................................... 276
6.5 Graphic Memory Controller................................................................................................................................... 300
6.6 2D acceleration ...................................................................................................................................................... 303
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MediaTek Inc. Confidential

3 Page

MT6229 pdf
MT6229 / MT6230 GSM/GPRS/EDGE Baseband Processor Data Sheet Revision 2.01
Fast IrDA, USB 1.1 Full Speed OTG, SDIO, Bluetooth and
WIFI Interface, and MMC/SD/MS/MS Pro storage
systems. All these interfaces provide MT6229 / MT6230
users with the highest degree of flexibility in implementing
solutions suitable for the targeted application.
To achieve a complete user interface, MT6229 / MT6230
also bring together all the necessary peripheral blocks for a
multi-media 2.75G phone. The peripheral blocks includes
the Keypad Scanner with the capability to detect multiple
key presses, SIM Controller, Alerter, Real Time Clock,
PWM, Serial LCD Controller, and General Purpose
Programmable I/Os.
Furthermore, to provide more configuration and bandwidth
for multi-media products, an additional 18-bit parallel
interface is incorporated. This interface enables connection
to LCD panels as well as connection to NAND flash
devices for additional multi-media data storage.
Audio
Using a highly integrated mixed-signal Audio Front-End,
architecture of both MT6229 and MT6230 allow for easy
audio interfacing with direct connection to the audio
transducers. The audio interface integrates D/A and A/D
Converters for Voice band, as well as high resolution
Stereo D/A Converters for Audio band. In addition,
MT6229 / MT6230 also provide Stereo Input and Analog
Mux.
MT6229 and MT6230 support AMR codec to adaptively
optimize speech and audio quality. Moreover, HE-AAC
codec is implemented to deliver CD-quality audio at low
bit rates.
On the whole, MT6229 and MT6230’s audio features
provide a rich solution for multi-media applications.
Radio
Both MT6229 / MT6230 integrate a mixed-signal
Baseband front-end in order to provide a well-organized
radio interface with flexibility for efficient customization.
It contains gain and offset calibration mechanisms, and
filters with programmable coefficients for comprehensive
compatibility control on RF modules. This approach also
allows the usage of a high resolution D/A Converter for
controlling VCXO or crystal, thus reducing the need for
expensive TCVCXO. MT6229 / MT6230 achieve great
MODEM performance by utilizing 14-bit high resolution
A/D Converter in the RF downlink path. Furthermore, to
reduce the need for extra external current-driving
component, the driving strength of some BPI outputs is
designed to be configurable.
Debug Function
The JTAG interface enables in-circuit debugging of
software program with the ARM7EJ-S core. With this
standardized debugging interface, MT6229 and MT6230
provide developers with a wide set of options in choosing
ARM development kits from different third party vendors.
Power Management
MT6229 and MT6230 offer various low-power features to
help reduce system power consumption. These features
include Pause Mode of 32KHz clocking at Standby State,
Power Down Mode for individual peripherals, and
Processor Sleep Mode. In addition, MT6229 and MT6230
are also fabricated in advanced low leakage CMOS process,
hence providing an overall ultra low leakage solution.
Package
The MT6229 and MT6230 devices are offered in a
13mm×13mm, 314-ball, 0.65 mm pitch, TFBGA package.
6/667
MediaTek Inc. Confidential

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