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Numéro de référence ADN8831
Description Thermoelectric Cooler (TEC) Controller
Fabricant Analog Devices 
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ADN8831 Datasheet, Description
Data Sheet
Thermoelectric Cooler (TEC) Controller
ADN8831
FEATURES
GENERAL DESCRIPTION
Two integrated zero drift, rail-to-rail, chop amplifiers
TEC voltage and current operation monitoring
Programmable TEC maximum voltage and current
Programmable TEC current heating and cooling limits
Configurable PWM switching frequency up to 1 MHz
Power efficiency: > 90%
Temperature lock indication
Optional internal or external clock source
Clock phase adjustment for multiple drop operation
Supports negative temperature coefficient (NTC) thermistors
or positive temperature coefficient (PTC) resistance
thermal detectors (RTDs)
5 V typical and optional 3 V supplies
Standby and shutdown mode availability
Adjustable soft start feature
5 mm × 5 mm 32-lead LFCSP
APPLICATIONS
Thermoelectric cooler (TEC) temperature control
DWDM optical transceiver modules
Optical fiber amplifiers
Optical networking systems
Instruments requiring TEC temperature control
The ADN8831 is a monolithic TEC controller. It has two inte-
grated, zero drift, rail-to-rail comparators, and a PWM driver.
A unique PWM driver works with an analog driver to control
external selected MOSFETs in an H-bridge. By sensing the
thermal detector feedback from the TEC, the ADN8831 can
drive a TEC to settle the programmable temperature of a laser
diode or a passive component attached to the TEC module.
The ADN8831 supports NTC thermistors or positive tempera-
ture coefficient (PTC) RTDs. The target temperature is set as an
analog voltage input either from a DAC or from an external
resistor divider driven by a reference voltage source.
A proportional integral differential (PID) compensation
network helps to quickly and accurately stabilize the ADN8831
thermal control loop. An adjustable PID compensation network
example is described in the AN-695 Application Note, Using the
ADN8831 TEC Controller Evaluation Board. A typical reference
voltage of 2.5 V is available from the ADN8831 for thermistor
temperature sensing or for TEC voltage/current measuring and
limiting in both cooling and heating modes.
FUNCTIONAL BLOCK DIAGRAM
ILIMC ILIMH ITEC VLIM VTEC CS
IN1P
IN1N
AMPLIFIER
Chop1
OUT1
IN2P
IN2N
AMPLIFIER
Chop2
OUT2
LIMITER/MONITOR
CONTROL
REF
SOFT START
SHUTDOWN
LINEAR
MOSFET
DRIVER
PWM
MOSFET
DRIVER
OSCILLATOR
LFB
LPGATE
LNGATE
SFB
SPGATE
SNGATE
COMPSW
SW
COMPOSC
SYNCO
TMPGD VREF
SS/SB
Figure 1.
SYNCI/SD PHASE FREQ
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevices for itsuse,nor foranyinfringementsofpatentsor other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2005–2012 Analog Devices, Inc. All rights reserved.
ADN8831 Fiche technique
ADN8831
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
Detailed Block Diagram .................................................................. 3
Specifications..................................................................................... 4
Electrical Characteristics ............................................................. 4
Absolute Maximum Ratings............................................................ 6
Thermal Characteristics .............................................................. 6
ESD Caution.................................................................................. 6
Pin Configuration and Function Descriptions............................. 7
Typical Performance Characteristics ............................................. 9
Theory of Operation ...................................................................... 11
Oscillator Clock Frequency....................................................... 12
Oscillator Clock Phase............................................................... 12
REVISION HISTORY
8/12—Rev. 0 to Rev. A
Changes to Features and General Description Sections.............. 1
Moved Figure 2 ................................................................................. 3
Changes to Figure 2.......................................................................... 3
Changes to Table 1............................................................................ 4
Changes to Table 2 and Table 3....................................................... 6
Changes to Figure 3 and Table 4..................................................... 7
Changes to Theory of Operation Section and Figure 12........... 11
Changes to Figure 14 and Figure 15............................................. 11
Changes to Oscillator Clock Frequency Section and Oscillator
Clock Phase Section ....................................................................... 12
Changes to Soft Start on Power-Up Section, Shutdown Mode
Section, Standby Mode Section, and TEC Voltage/Current
Monitor Section .............................................................................. 13
Changes to Figure 17...................................................................... 15
Changes to PID Compensation Amplifier (Chop2) Section .... 16
Changes to MOSFET Driver Amplifier Section and Figure 21 ..17
Updated Outline Dimensions ....................................................... 18
Changes to Ordering Guide .......................................................... 18
9/05—Revision 0: Initial Version
Data Sheet
Temperature Lock Indicator ..................................................... 13
Soft Start on Power-Up.............................................................. 13
Shutdown Mode ......................................................................... 13
Standby Mode ............................................................................. 13
TEC Voltage/Current Monitor ................................................. 13
Maximum TEC Voltage Limit .................................................. 13
Maximum TEC Current Limit ................................................. 14
Applications Information .............................................................. 15
Signal Flow .................................................................................. 15
Thermistor Setup........................................................................ 15
Thermistor Amplifier (Chop1) ................................................ 15
PID Compensation Amplifier (Chop2) .................................. 16
MOSFET Driver Amplifier ....................................................... 17
Outline Dimensions ....................................................................... 18
Ordering Guide .......................................................................... 18
Rev. A | Page 2 of 20

3 Page

ADN8831 pdf
Data Sheet
Parameter1
LOGIC Controls
Logic Low Output Voltage
Logic High Output Voltage
Logic Low Input Voltage
Logic High Input Voltage
Output High Impedance
Output Low Impedance
Output High Impedance
Output Low Impedance
TEC CURRENT MEASUREMENT
ITEC Gain
ITEC Output Range High
ITEC Output Range Low
ITEC Input Range2
ITEC Bias Voltage
Maximum ITEC Driving Current
TEC VOLTAGE MEASUREMENT
VTEC Gain
VTEC Output Range2
VTEC Bias Voltage2
VTEC Output Load Resistance
VOLTAGE LIMIT
VLIM Gain
VLIM Input Range2
VLIM Input Current, Cooling
VLIM Input Current, Heating
VLIM Input Current Accuracy, Heating
CURRENT LIMIT
ILIMC Input Voltage Range
ILIMH Input Voltage Range
ILIMC Limit Threshold
ILIMH Limit Threshold
TEMPERATURE GOOD
High Threshold
Low Threshold
Symbol
VOL
VOH
VIL
VIH
AV, ITEC
VITEC, HIGH
VITEC, LOW
VCS, VLFB
VITEC, B
IOUT, TEC
AV, VTEC
VVTEC
VVTEC, B
RVTEC
AV, LIM
VVLIM
IVLIM, COOL
IVLIM, HEAT
IVLIM, HEAT
VILIMC
VILIMH
VTH, ILIMC
VTH, ILIMH
VOUT1, TH1
VOUT1, TH2
Test Conditions/Comments
TMPGD, SYNCO, IOUT = 0 A
TMPGD, SYNCO, IOUT = 0 A
VDD = 5.0 V
VDD = 5.0 V
VDD = 3.0 V
VDD = 3.0 V
(VITEC – VREF/2) / (VLFB − VCS)
No load
VLFB = VCS = 0
(VVTEC – VREF/2)/(VLFB − VSFB)
VDD = 5.0 V
VLFB = VSFB = 0 V
IVTEC = 300 μA
(VLFB − VSFB)/VVLIM
VOUT2 < VREF/2
VOUT2 > VREF/2
IVLIM/IFREQ
VITEC = 2.0 V, RS = 20 mΩ
VITEC = 0.5 V
IN2M tied to OUT2, VIN2P = 1.5 V
IN2M tied to OUT2, VIN2P = 1.5 V
1 Logic inputs meet typical CMOS I/O conditions for source/sink current (~1 µA).
2 Guaranteed by design or indirect test methods.
3 The ADN8831 does not work when the supply voltage is less than UVLO.
ADN8831
Min
Typ Max
Unit
VDD − 0.2
3
35
20
50
25
0.2
0.2
V
V
V
V
25
VDD − 0.05
0
1.10 1.20
±1.5
0.05
VDD
1.30
V/V
V
V
V
V
mA
0.23
0.25 0.28
V/V
0.05 2.5 V
1.20
1.25 1.35
V
35 Ω
5 V/V
0 VDD V
100 nA
IFREQ
mA
0.8 1.0 1.18 A/A
VREF/2
0.1
1.98
0.48
VDD − 1 V
VREF/2
V
2.0 2.02 V
0.5 0.52 V
1.55 1.60
V
1.40 1.45
V
Rev. A | Page 5 of 20

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