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Numéro de référence ADUM2402
Description (ADUM2400 - ADUM2402) Quad-Channel Digital Isolators
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ADUM2402 Datasheet, Description
Preliminary Technical Data
Quad-Channel Digital Isolators, 5KV
ADuM2400/ADuM2401/ADuM2402
FEATURES
Low power operation
5 V operation:
1.0 mA per channel max @ 0–2 Mbps
3.5 mA per channel max @ 10 Mbps
31 mA per channel max @ 90 Mbps
3 V operation:
0.7 mA per channel max @ 0–2 Mbps
2.1 mA per channel max @ 10 Mbps
20 mA per channel max @ 90 Mbps
Bidirectional communication
3 V/5 V level translation
High temperature operation: 105°C
High data rate: DC–90 Mbps (NRZ)
Precise timing characteristics:
2 ns max. pulsewidth distortion
2 ns max. channel-to-channel matching
High common-mode transient immunity: > 25 kV/μs
Output enable function
Wide body SOIC 16-lead package
Safety and regulatory approvals (pending)
UL recognition: 5000 V rms for 1 minute per UL 1577
CSA component acceptance notice #5A
VDE certificate of conformity
DIN EN 60747-5-2 (VDE 0884 Part 2): 2003-01
DIN EN 60950 (VDE 0805):2001-12;EN 60950:2000
VIORM = 848 V peak
IEC 60601-1
APPLICATIONS
General-purpose, high voltage, multichannel isolation
Medical Equipment
Motor Drives
Power Supplies
GENERAL DESCRIPTION
The ADuM240x are four-channel digital isolators based on
Analog Devices’ iCoupler® technology. Combining high speed
CMOS and monolithic air core transformer technology, these
isolation components provide outstanding performance
characteristics superior to alternatives such as optocoupler
devices. In comparison to the 2.5KV ADuM140x product
family, ADuM240x models have increased insulation thickness
to achieve the higher 5.0KV isolation rating.
By avoiding the use of LEDs and photodiodes, iCoupler devices
remove the design difficulties commonly associated with
optocouplers. The typical optocoupler concerns regarding
uncertain current transfer ratios, nonlinear transfer functions,
and temperature and lifetime effects are eliminated with the
simple, iCoupler digital interfaces and stable performance
characteristics. The need for external drivers and other discretes
is eliminated with these iCoupler products. Furthermore,
iCoupler devices run at one-tenth to one-sixth the power
consumption of optocouplers at comparable signal data rates.
The ADuM240x isolators provide four independent isolation
channels in a variety of channel configurations and data rates (see
Ordering Guide). All ADuM240x models operate with the supply
voltage of either side ranging from 2.7 V to 5.5 V, providing
compatibility with lower voltage systems as well as enabling a
voltage translation functionality across the isolation barrier. In
addition, the ADuM240x provides low pulse width distortion (<2
ns for CRWZ grade), and tight channel-to-channel matching (<2
ns for CRWZ grade). Unlike other optocoupler alternatives, the
ADuM240x isolators have a patented refresh feature that ensures
dc correctness in the absence of input logic transitions and during
power-up/power-down conditions.
VDD1 1
GND1 2
VIA 3
VIB 4
VIC 5
VID 6
NC 7
GND1 8
ENCODE
ENCODE
ENCODE
ENCODE
DECODE
DECODE
DECODE
DECODE
16 VDD2
15 GND2
14 VOA
13 VOB
12 VOC
11 VOD
10 VE2
9 GND2
Figure 1. ADuM2400 Functional Block Diagram
FUNCTIONAL BLOCK DIAGRAMS
Vdd1 1
GND1 2
VIA 3
VIB 4
VIC 5
VOD 6
VE1 7
GND1 8
ENCODE
ENCODE
ENCODE
DECODE
DECODE
DECODE
DECODE
ENCODE
16 Vdd2
15 GND2
14 VOA
13 VOB
12 VOC
11 VID
10 VE2
9 GND2
Figure 2. ADuM2401 Functional Block Diagram
VDD1 1
GND1 2
VIA 3
VIB 4
VOC 5
VOD 6
VE1 7
GND1 8
ENCODE
ENCODE
DECODE
DECODE
DECODE
DECODE
ENCODE
ENCODE
16 VDD2
15 GND2
14 VOA
13 VOB
12 VIC
11 VID
10 VE2
9 GND2
Figure 3. ADuM2402 Functional Block Diagram
Rev. PrD October 5, 2004
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.326.8703 © 2004 Analog Devices, Inc. All rights reserved.
ADUM2402 Fiche technique
Preliminary Technical Data
Parameter
SWITCHING SPECIFICATIONS
ADuM240xARW
Minimum Pulsewidth3
Maximum Data Rate4
Propagation Delay5
Pulsewidth Distortion, |tPLH-tPHL|5
Propagation Delay Skew6
Channel-to-Channel Matching7
ADuM240xBRW
Minimum Pulsewidth3
Maximum Data Rate4
Propagation Delay5
Pulsewidth Distortion, |tPLH – tPHL|5
Change Versus Temperature
Propagation Delay Skew6
Channel-to-Channel Matching, Co-Directional
Channels7
Channel-to-Channel Matching, Opposing-Directional
Channels7
ADuM240xCRW
Minimum Pulsewidth3
Maximum Data Rate4
Propagation Delay5
Pulsewidth Distortion, |tPLH – tPHL|5
Change Versus Temperature
Propagation Delay Skew6
Channel-to-Channel Matching, Co-Directional
Channels7
Channel-to-Channel Matching, Opposing-Directional
Channels7
For All Models
Output Disable Propagation Delay
(High/Low to High Impedance)
Output Enable Propagation Delay
(High Impedance to High/Low)
Output Rise/Fall Time (10%–90%)
Common-Mode Transient Immunity at Logic High
Output8
Common-Mode Transient Immunity at Logic Low
Output8
Refresh Rate
Input Dynamic Supply Current, per Channel9
Output Dynamic Supply Current, per Channel9
See Notes on next page.
Symbol Min
PW
tPHL, tPLH
PWD
tPSK
tPSKCD/OD
1
50
PW
tPHL, tPLH
PWD
10
20
tPSK
tPSKCD
tPSKOD
PW
tPHL, tPLH
PWD
90
18
tPSK
tPSKCD
tPSKOD
tPHZ, tPLH
tPZH, tPZL
tR/tF
|CMH|
25
|CML|
25
fr
IDDI(D)
IDDO(D)
ADuM2400/ADuM2401/ADuM2402
Typ Max Unit Test Conditions
1000 ns
CL = 15 pF, CMOS signal levels
Mbps CL = 15 pF, CMOS signal levels
65 100 ns
CL = 15 pF, CMOS signal levels
40 ns
CL = 15 pF, CMOS signal levels
50 ns
CL = 15 pF, CMOS signal levels
50 ns
CL = 15 pF, CMOS signal levels
100 ns
CL = 15 pF, CMOS signal levels
Mbps CL = 15 pF, CMOS signal levels
32 50 ns
CL = 15 pF, CMOS signal levels
3 ns
CL = 15 pF, CMOS signal levels
5 ps/°C CL = 15 pF, CMOS signal levels
15 ns
CL = 15 pF, CMOS signal levels
3 ns
CL = 15 pF, CMOS signal levels
6 ns
CL = 15 pF, CMOS signal levels
8.3 11.1
120
27 32
0.5 2
3
10
2
ns
Mbps
ns
ns
ps/°C
ns
ns
CL = 15 pF, CMOS signal levels
CL = 15 pF, CMOS signal levels
CL = 15 pF, CMOS signal levels
CL = 15 pF, CMOS signal levels
CL = 15 pF, CMOS signal levels
CL = 15 pF, CMOS signal levels
CL = 15 pF, CMOS signal levels
5 ns
CL = 15 pF, CMOS signal levels
68
68
2.5
35
35
1.2
0.19
0.05
ns CL = 15 pF, CMOS signal levels
ns CL = 15 pF, CMOS signal levels
ns CL = 15 pF, CMOS signal levels
kV/µs VIx = VDD1/DD2, VCM = 1000 V,
transient magnitude = 800 V
kV/µs VIx = 0 V, VCM = 1000 V,
transient magnitude = 800 V
Mbps
mA/Mbps
mA/Mbps
Rev. PrD | Page 3 of 23

3 Page

ADUM2402 pdf
ADuM2400/ADuM2401/ADuM2402
Parameter
SWITCHING SPECIFICATIONS
ADuM240xARW
Minimum Pulsewidth3
Maximum Data Rate4
Propagation Delay5
Pulsewidth Distortion, |tPLH – tPHL|5
Propagation Delay Skew6
Channel-to-Channel Matching7
ADuM240xBRW
Minimum Pulsewidth3
Maximum Data Rate4
Propagation Delay5
Pulsewidth Distortion, |tPLH – tPHL|5
Change Versus Temperature
Propagation Delay Skew6
Channel-to-Channel Matching, Co-Directional
Channels7
Channel-to-Channel Matching, Opposing-Directional
Channels7
ADuM240xCRW
Minimum Pulsewidth3
Maximum Data Rate4
Propagation Delay5
Pulsewidth Distortion, |tPLH – tPHL|5
Change Versus Temperature
Propagation Delay Skew6
Channel-to-Channel Matching, Co-Directional
Channels7
Channel-to-Channel Matching, Opposing-Directional
Channels7
For All Models
Output Disable Propagation Delay
(High/Low to High Impedance)
Output Enable Propagation Delay
(High Impedance to High/Low)
Output Rise/Fall Time (10%–90%)
Common Mode Transient Immunity at Logic High
Output8
Common Mode Transient Immunity at Logic Low
Output8
Refresh Rate
Input Dynamic Supply Current, per Channel9
Output Dynamic Supply Current, per Channel9
See Notes on next page.
Symbol Min
PW
tPHL, tPLH
PWD
tPSK
tPSKCD/OD
1
50
PW
tPHL, tPLH
PWD
10
20
tPSK
tPSKCD
tPSKOD
PW
tPHL, tPLH
PWD
90
20
tPSK
tPSKCD
tPSKOD
tPHZ, tPLH
tPZH, tPZL
tR/tF
|CMH|
25
|CML|
25
fr
IDDI(D)
IDDO(D)
Preliminary Technical Data
Typ Max Unit Test Conditions
1000 ns
CL = 15pF, CMOS signal levels
Mbps CL = 15pF, CMOS signal levels
75 100 ns
CL = 15pF, CMOS signal levels
40 ns
CL = 15pF, CMOS signal levels
50 ns
CL = 15pF, CMOS signal levels
50 ns
CL = 15pF, CMOS signal levels
100 ns
CL = 15pF, CMOS signal levels
Mbps CL = 15pF, CMOS signal levels
38 50 ns
CL = 15pF, CMOS signal levels
3 ns
CL = 15pF, CMOS signal levels
5 ps/°C CL = 15pF, CMOS signal levels
22 ns
CL = 15pF, CMOS signal levels
3 ns
CL = 15pF, CMOS signal levels
6 ns
CL = 15pF, CMOS signal levels
8.3 11.1 ns
120 Mbps
34 45 ns
0.5 2
ns
3 ps/°C
16 ns
2 ns
CL = 15pF, CMOS signal levels
CL = 15pF, CMOS signal levels
CL = 15pF, CMOS signal levels
CL = 15pF, CMOS signal levels
CL = 15pF, CMOS signal levels
CL = 15pF, CMOS signal levels
CL = 15pF, CMOS signal levels
5 ns
CL = 15pF, CMOS signal levels
68
68
3
35
35
1.1
0.10
0.03
ns CL = 15pF, CMOS signal levels
ns CL = 15pF, CMOS signal levels
ns CL = 15pF, CMOS signal levels
kV/µs VIx = VDD1/DD2, VCM = 1000 V,
transient magnitude = 800 V
kV/µs VIx = 0 V, VCM = 1000 V,
transient magnitude = 800 V
Mbps
mA/Mbps
mA/Mbps
Rev. PrD| Page 6 of 23

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