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PDF SM9103M Fiche technique ( Data sheet )

Numéro de référence SM9103M
Description DVDRAM Head Amplifier LSI
Fabricant Nippon Precision Circuits Inc 
Logo Nippon Precision Circuits Inc Logo 



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SM9103M Datasheet, Description
NIPPON PRECISION CIRCUITS INC.
SM9103M
DVDRAM Head Amplifier LSI
OVERVIEW
The SM9103M is a photodiode photoelectric cur-
rent-to-voltage conversion head amplifier LSI for
optical disk pickups in DVDRAM/DVDROM equip-
ment. It sums the photodiode current data signals and
then converts the signals to a differential signal for
output. The output tracking servo and focusing servo
signals are derived from built-in sum and difference
circuits, and the gain for these servo signals can be
adjusted using serial interface controls. Each of the
signals from the photodiodes, used to generate DPD
(Differential Phase Detection) tracking servo signal,
is current-to-voltage converted and then also output.
It operates from a single 5 V supply, and is available
in 36-pin plastic SSOP packages.
FEATURES
s RAM/ROM gain switching, low-noise RF signal
generator (differential output)
s ROM tracking DPD signal output
s Variable-gain RAM tracking push-pull signal out-
put
s Address signal, high-speed push-pull signal output
s Variable-gain focus error signal output
s Tracking PD sum signal output
s Focus PD sum signal output
s Offset correction timing output (logic)
s Temperature monitor function
s Serial interface to control internal parameter set-
tings
s Sleep-mode function
s Single 5 V supply
s 36-pin plastic SSOP
PINOUT
36-pin SSOP
(Top view)
MODE 1
WRITE 2
DGND 3
DVCC 4
TEMPO 5
TEMPI 6
T1 7
T2 8
T3 9
T4 10
F1 11
F2 12
AGND 13
VREF 14
FSUBB 15
FSUB 16
FADDB 17
FADD 18
TYPICAL APPLICATIONS
s Double-speed DVDROM equipment
s Double-speed DVDRAM equipment
ORDERING INFORMATION
Device
SM9103M
Package
36-pin SSOP
36 SCLK
35 SDATA
34 SENB
33 CALREQ
32 TADD
31 TADDB
30 CAPAP
29 CAPAN
28 TSUB
27 TSUBB
26 DATAP
25 DATAN
24 DPDA
23 DPDB
22 DPDC
21 DPDD
20 AVCC
19 AGND
NIPPON PRECISION CIRCUITS—1
SM9103M Fiche technique
SM9103M
PIN DESCRIPTION
Number
Name
I/O1
Function
1
MODE
Ipd Mode switching/offset correction control input 1
2
WRITE
Ipd Mode switching/offset correction control input 2
3
DGND
– Logic circuit ground. Connect to the analog ground if there is no dedicated pickup or logic ground.
4
DVCC
– Logic circuit supply. Connect to the analog supply if there is no dedicated pickup or logic supply.
5
TEMPO
O Thermal sensor test output. Leave open for normal operation
6
TEMPI
I Thermal sensor test input. Leave open for normal operation
7 T1 I Tracking PD input A
8 T2 I Tracking PD input B
9 T3 I Tracking PD input C
10 T4 I Tracking PD input D
11 F1 I Focus PD input E
12 F2 I Focus PD input F
13
AGND
– Analog circuit ground
14
VREF
I 2.0 V reference voltage input
15
FSUBB
I Focus error signal feedback input
16
FSUB
O Focus error signal output
17
FADDB
I Focus sum signal feedback input
18
FADD
O Focus sum signal output
19
AGND
– Analog circuit ground
20
AVCC
– Analog circuit supply
21
DPDD
O Buffered tracking signal output D for DPD servo
22
DPDC
O Buffered tracking signal output C for DPD servo
23
DPDB
O Buffered tracking signal output B for DPD servo
24
DPDA
O Buffered tracking signal output A for DPD servo
25
DATAN
O Phase-modulated data signal differential inverting output
26
DATAP
O Phase-modulated data signal differential non-inverting output
27
TSUBB
I Tracking push-pull signal feedback input
28
TSUB
O Tracking push-pull signal output
29
CAPAN
O ID data signal differential inverting output
30
CAPAP
O ID data signal differential non-inverting output
31
TADDB
I Tracking PD sum signal feedback input
32
TADD
O Tracking PD sum signal output
33
CALREQ
O Offset correction status/request output
34
SENB
I Serial interface enable input
35
SDATA
I/O Serial interface data input/acknowledge output
36
SCLK
I Serial interface clock input
1. I = input, Ipd = Input with built-in pull-down resistor, I/O = input/output, O = output
NIPPON PRECISION CIRCUITS—3

3 Page

SM9103M pdf
SM9103M
Data Signal Processor Characteristics
VCC = 5 V ± 5%, GND = 0 V, Ta = 0 to 70 °C
Parameter
Condition
Rating
min typ max
DATAPDATAN current-to-voltage
converter coefficient1
RAM read
ROM read
10.0 12.5 15.0
2.50 3.12 3.74
CAPAPCAPAN current-to-voltage
converter coefficient2
RAM read
11.3 14.1 16.9
DATAP, DATAN, CAPAP, CAPAN output
impedance
– – 100
DATAP, DATAN, CAPAP, CAPAN output
center voltage3
No signal
0.9VREF – 1.1VREF
CAPAP, CAPAN output center voltage
difference3
No signal
– – ±50
DATAP, DATAN, CAPAP, CAPAN output
operating output voltage
10 kload, output center voltage reference
0.7
+0.7
Variable coefficient switching time
Saturation output reset time4
DATAP, DATAN signal bandwidth5
CAPAP, CAPAN signal bandwidth5
RAM ROM read
RAM write RAM read
f = 100 kHz 3 dB frequency
f = 100 kHz 3 dB frequency
– – 10
– – 500
19 –
20 –
DATAPDATAN, CAPAPCAPAN gain
peaking5
f = 100 kHz 3 dB frequency
3 – +0.5
DATAPDATAN, CAPAPCAPAN group
delay time5
f = 1 to 10 MHz
– – ±1.0
1. [DATAP DATAN] = K × [IT1 + IT2 + IT3 + IT4]
2. [CAPAP CAPAN] = K × {[IT1 + IT2] [IT3 + IT4]}
3. 5 kload connected to ground to prevent abnormal operation
4. Converging to within final value ± 10%
5. 10 pF input load capacitors connected to T1, T2, T3, T4. DATAP, DATAN, CAPAP, CAPAN output load conditions shown below.
Unit
k
k
V
mV
V
ms
ns
MHz
MHz
dB
ns
DATAP
0.01µF
5pF 5pF
DATAN
0.01µF
5pF 5pF
CAPAP
10k
CAPAN
0.01µF
10pF 5pF
0.01µF
10pF 5pF
10k
NIPPON PRECISION CIRCUITS—6

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