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PDF UT54ACS138E Fiche technique - Aeroflex Circuit Technology

Numéro de référence UT54ACS138E
Description 3-Line to 8-Line Decoders/Demultiplexers
Fabricant Aeroflex Circuit Technology 
Logo Aeroflex Circuit Technology Logo 



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UT54ACS138E Datasheet, Description
UT54ACS138E
3-Line to 8-Line Decoders/Demultiplexers
July, 2013
Datasheet
www.aeroflex.com/Logic
FEATURES
0.6mCRH CMOS process
- Latchup immune
High speed
Low power consumption
Wide power supply operating range of 3.0V to 5.5V
Available QML Q or V processes
16-pin flatpack
UT54ACS138E - SMD - 5962-96544
DESCRIPTION
The UT54ACS138E is a 3-line to 8-line decoder/demultiplexer
designed to be used in high-performance memory-decoding or
data-routing applications requiring very short propagation delay
times.
The conditions at the binary select inputs and the three enable
inputs select one of eight output lines. Two active-low and one
active-high enable inputs reduce the need for external gates of
inverters when expanding. A 24-line decoder can be implement-
ed without external inverters and a 32-line decoder requires only
one inverter. An enable input can be used as a data input for
demultiplexing applications.
The device is characterized over full military temperature range
of -55C to +125C.
FUNCTION TABLE
ENABLE INPUTS
G1
G2A
G2B
XXH
LXX
XHX
HL L
HL L
HL L
HL L
HL L
HL L
HL L
HL L
SELECT INPUTS
CBA
XXX
XXX
XXX
LLL
L LH
LHL
L HH
HL L
HLH
HH L
HHH
Y0
H
H
H
L
H
H
H
H
H
H
H
PINOUT
A
B
C
G2A
G2B
G1
Y7
VSS
Y1 Y2
HH
HH
HH
HH
LH
HL
HH
HH
HH
HH
HH
16-Lead Flatpack
Top View
1 16
2 15
3 14
4 13
5 12
6 11
7 10
89
VDD
Y0
Y1
Y2
Y3
Y4
Y5
Y6
OUTPUT
Y3 Y4 Y5 Y6 Y7
HHHHH
HHHHH
HHHHH
HHHHH
HHHHH
HHHHH
L HHHH
H L HHH
HH L HH
HHH L H
HHHH L
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UT54ACS138E Fiche technique
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UT54ACS138E pdf
CIN Input capacitance 5
COUT Output capacitance 5
= 1MHz
VDD = 0V
= 1MHz
VDD = 0V
15 pF
15 pF
Notes:
* For devices procured with a total ionizing dose tolerance guarantee, the post-irradiation performance is guaranteed at 25×C per MIL-STD-883 Method 1019, Condition
A up to the maximum TID level procured.
1. Functional tests are conducted in accordance with MIL-STD-883 with the following input test conditions: VIH = VIH(min) + 20%, - 0%; VIL = VIL(max) + 0%, -
50%, as specified herein, for TTL, CMOS, or Schmitt compatible inputs. Devices may be tested using any input voltage within the above specified range, but are
guaranteed to VIH(min) and VIL(max).
2. Supplied as a design limit but not guaranteed or tested.
3. Per MIL-PRF-38535, for current density 5.0E5 amps/cm2, the maximum product of load capacitance (per output buffer) times frequency should not exceed 3,765pF/
MHz.
4. Not more than one output may be shorted at a time for maximum duration of one second.
5. Capacitance measured for initial qualification and when design changes may affect the value. Capacitance is measured between the designated terminal and VSS at
frequency of 1MHz and a signal amplitude of 50mV rms maximum.
6. Maximum allowable relative shift equals 50mV.
7. Power dissipation specified per switching output.
8. Parameter guaranteed by design and characterization, but is not tested.
AC ELECTRICAL CHARACTERISTICS (Pre and Post-Radiation)*
(VDD = 3.0V to 5.5V; VSS = 0V 1, -55C < TC < +125C); Unless otherwise noted, Tc is per the temperature range ordered
SYMBOL
PARAMETER
CONDITION
VDD
MINIMUM MAXIMUM UNIT
tPLH1
Binary select to Yn
CL = 50pF
3.0V to 3.6V
4.5V to 5.5V
4
3
19 ns
10
tPHL1
Binary select to Yn
CL = 50pF
3.0V to 3.6V
4.5V to 5.5V
4
3
19 ns
10
tPLH2
Enable to Output Yn
CL = 50pF
3.0V to 3.6V
4.5V to 5.5V
3
3
19 ns
10
tPHL2
Enable to Output Yn
CL = 50pF
3.0V to 3.6V
4.5V to 5.5V
4
3
19 ns
10
Notes:
* For devices procured with a total ionizing dose tolerance guarantee, the post-irradiation performance is guaranteed at 25×C per MIL-STD-883 Method 1019, Condition
A up to the maximum TID level procured.
1. Maximum allowable relative shift equals 50mV.
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