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Numéro de référence UT54ACS132E
Description Quadruple 2-Input NAND Schmitt Triggers
Fabricant Aeroflex Circuit Technology 
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UT54ACS132E Datasheet, Description
UT54ACS132E
Quadruple 2-Input NAND Schmitt Triggers
October 2008
www.aeroflex.com/Logic
FEATURES
0.6μm CRH CMOS Process
- Latchup immune
• High speed
• Low power consumption
• Wide operating power supply from 3.0V to 5.5V
• Available QML Q or V processes
• 14-lead flatpack
DESCRIPTION
The UT54ACS132 is a quadruple 2-input NAND gate with
Schmitt Trigger input levels. A high applied on both the inputs
forces the output to a low state.
The devices are characterized over full HiRel temperature range
of -55°C to +125°C.
LOGIC SYMBOL
(1)
A1
(2)
B1
(4)
A2
(5)
B2
(9)
A3
(10)
B3
(12)
A4
(13)
B4
&
(3) Y1
(6) Y2
(8) Y3
(11) Y4
Note:
1. Logic symbol in accordance with ANSI/IEEE standard 91-1984
and IEC Publication 617-12.
FUNCTION TABLE
INPUTS
An Bn
LL
LH
HL
HH
OUTPUT
Yn
H
H
H
L
PINOUT
A1
B1
Y1
A2
B2
Y2
VSS
14-Lead Flatpack
Top View
1 14
2 13
3 12
4 11
5 10
69
78
LOGIC DIAGRAM
A1
B1
A2
B2
A3
B3
A4
B4
Y1
Y2
Y3
Y4
VDD
B4
A4
Y4
B3
A3
Y3
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UT54ACS132E Fiche technique
DC ELECTRICAL CHARACTERISTICS FOR THE UT54ACS132E7
( VDD = 3.0V to 5.5V; VSS = 0V6; -55°C < TC < +125°C)
SYMBOL
Description
VT+ Schmitt trigger positive-going
threshold 1
VT- Schmitt trigger negative-going
threshold 1
VH Hysteresis2
(VT+ - VT-)
IIN Input leakage current
VOL Low-level output voltage 3
CONDITION
VIN = VDD or VSS
IOL = 100μA
VOH High-level output voltage 3
IOH = -100μA
IOS Short-circuit output current 2 ,4 VO = VDD and VSS
VDD
3.0V
5.5V
3.0V
5.5V
3.0V
4.5V
5.5V
3.0V
4.5V
3.0V
4.5V
3.0V
5.5V
MIN
0.9
1.65
0.3
.6
-1
2.75
4.25
-100
-200
MAX
2.1
3.85
UNIT
V
V
1.2 V
1.5
1 μA
0.25 V
0.25
V
100 mA
200
IOL Low level output current9
VIN = VDD or VSS
VOL = 0.4V
3.0V 6
5.5V 8
mA
IOH High level output current9
Ptotal Power dissipation 2, 8
IDDQ
CIN
COUT
Quiescent Supply Current
Input capacitance 5
Output capacitance 5
VIN = VDD or VSS
VOH = VDD-0.4V
CL = 50pF
VIN = VDD or VSS
ƒ = 1MHz
ƒ = 1MHz
3.0V
5.5V
5.5V
3.0V
5.5V
0V
0V
-6 mA
-8
1.9 mW/
0.76 MHz
10 μA
15 pF
15 pF
Notes:
1. Functional tests are conducted in accordance with MIL-STD-883 with the following input test conditions: VIH = VIH(min) + 20%, - 0%; VIL = VIL(max) + 0%, - 50%,
as specified herein, for TTL, CMOS, or Schmitt compatible inputs. Devices may be tested using any input voltage within the above specified range, but are guaranteed
to VIH(min) and VIL(max).
2. Supplied as a design limit but not guaranteed or tested.
3. Per MIL-PRF-38535, for current density 5.0E5 amps/cm2, the maximum product of load capacitance (per output buffer) times frequency should not exceed 3,765pF/
MHz.
4. Not more than one output may be shorted at a time for maximum duration of one second.
5. Capacitance measured for initial qualification and when design changes may affect the value. Capacitance is measured between the designated terminal and VSS at
frequency of 1MHz and a signal amplitude of 50mV rms maximum.
6. Maximum allowable relative shift equals 50mV.
7. All specifications valid for radiation dose 1E6 rads(Si) per MIL-STD-883 Method 1019 Condition A and section 3.11.2.
8. Power dissipation specified per switching output.
9. This value is guaranteed based on characterization data, but not tested.
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UT54ACS132E pdf
Ordering Information: UT54ACS132E: SMD
5962 * ***** ** * * *
Lead Finish: (Notes 1 & 2)
A = Solder
C = Gold
X = Optional
Package Type:
X = 14-lead ceramic bottom-brazed dual-in-line Flatpack
Class Designator:
Q = QML Class Q
V = QML Class V
Device Type:
02 = 1 rad(Si)/sec
03 = 50 to 300 rads(Si/Sec)
Drawing Number:
96542 = UT54ACS132E
Total Dose: (Note 3 & 4)
R = 1E5 rads(Si)
F = 3E5 rads(Si)
G = 5E5 rads(Si)
H = 1E6 rads(Si)
Notes:
1. Lead finish (A,C, or X) must be specified.
2. If an “X” is specified when ordering, part marking will match the lead finish and will be either “A” (solder) or “C” (gold).
3. Total dose radiation must be specified when ordering. QML Q and QML V not available without radiation hardening. For prototype inquiries, contact
factory.
4. Device type 02 is only offered with a TID tolerance guarantee of 3E5 rads(Si) or 1E6 rads(Si) and is tested in accordance with MIL-STD-883 Test
Method 1019 Condition A and section 3.11.2. Device type 03 is only offered with a TID tolerance guarantee of 1E5 rads(Si), 3E5 rads(Si), and 5E5
rads(Si), and is tested in accordance with MIL-STD-883 Test Method 1019 Condition A.
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