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Numéro de référence ADN8834
Description 1.5A Thermoelectric Cooler (TEC) Controller
Fabricant Analog Devices 
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ADN8834 Datasheet, Description
Data Sheet
Ultracompact, 1.5 A Thermoelectric Cooler
(TEC) Controller
ADN8834
FEATURES
Patented high efficiency single inductor architecture
Integrated low RDSON MOSFETs for the TEC controller
TEC voltage and current operation monitoring
No external sense resistor required
Independent TEC heating and cooling current limit settings
Programmable maximum TEC voltage
2.0 MHz PWM driver switching frequency
External synchronization
Two integrated, zero drift, rail-to-rail chopper amplifiers
Capable of NTC or RTD thermal sensors
2.50 V reference output with 1% accuracy
Temperature lock indicator
Available in a 25-ball, 2.5 mm × 2.5 mm WLCSP or in a
24-lead, 4 mm × 4 mm LFCSP
APPLICATIONS
TEC temperature control
Optical modules
Optical fiber amplifiers
Optical networking systems
Instruments requiring TEC temperature control
GENERAL DESCRIPTION
The ADN8834 is a monolithic TEC controller with an integrated
TEC controller. It has a linear power stage, a pulse-width
modulation (PWM) power stage, and two zero-drift, rail-to-rail
operational amplifiers. The linear controller works with the PWM
driver to control the internal power MOSFETs in an H-bridge
configuration. By measuring the thermal sensor feedback
voltage and using the integrated operational amplifiers as a
proportional integral differential (PID) compensator to condition
the signal, the ADN8834 drives current through a TEC to settle
the temperature of a laser diode or a passive component attached
to the TEC module to the programmed target temperature.
The ADN8834 supports negative temperature coefficient (NTC)
thermistors as well as positive temperature coefficient (PTC)
resistive temperature detectors (RTD). The target temperature is
set as an analog voltage input either from a digital-to-analog
converter (DAC) or from an external resistor divider.
IN1P
IN1N
OUT1
IN2P
IN2N
OUT2
FUNCTIONAL BLOCK DIAGRAM
VLIM/
VDD SD ILIM VTEC ITEC
PVIN
ERROR
AMP
TEC CURRENT
AND VOLTAGE
SENSE AND LIMIT
COMP
AMP
CONTROLLER
TEC DRIVER
LINEAR
POWER
STAGE
PWM
POWER
STAGE
LDR
SW
SFB
VOLTAGE
REFERENCE
OSCILLATOR
AGND
VREF
EN/SY
Figure 1.
PGNDx
The temperature control loop of the ADN8834 is stabilized by
PID compensation utilizing the built in, zero drift chopper
amplifiers. The internal 2.50 V reference voltage provides a 1%
accurate output that is used to bias a thermistor temperature
sensing bridge as well as a voltage divider network to program
the maximum TEC current and voltage limits for both the heating
and cooling modes. With the zero drift chopper amplifiers,
extremely good long-term temperature stability is maintained via
an autonomous analog temperature control loop.
Table 1. TEC Family Models
Device No. MOSFET Thermal Loop
ADN8831 Discrete Digital/analog
ADN8833 Integrated Digital
ADN8834 Integrated Digital/analog
Package
LFCSP (CP-32-7)
WLCSP (CB-25-7),
LFCSP (CP-24-15)
WLCSP (CB-25-7),
LFCSP (CP-24-15)
Rev. A
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
©2015 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
ADN8834 Fiche technique
ADN8834
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 6
Thermal Resistance ...................................................................... 6
ESD Caution.................................................................................. 6
Pin Configurations and Function Descriptions ........................... 7
Typical Performance Characteristics ............................................. 8
Detailed Functional Block Diagram ............................................ 12
Theory of Operation ...................................................................... 13
Analog PID Control ................................................................... 14
Digital PID Control.................................................................... 14
Powering the Controller ............................................................ 14
Enable and Shutdown ................................................................ 15
Oscillator Clock Frequency....................................................... 15
Temperature Lock Indicator (LFCSP Only) ........................... 15
Soft Start on Power-Up .............................................................. 15
REVISION HISTORY
8/15—Rev. 0 to Rev. A
Added 24-Lead LFCSP.......................................................Universal
Changes to Features Section and Table 1 ...................................... 1
Changes to Table 2............................................................................ 3
Changes to Table 3............................................................................ 6
Added Figure 3; Renumbered Sequentially .................................. 7
Changes to Figure 13........................................................................ 9
Changes to Figure 23 and Figure 24............................................. 11
Changes to Figure 25...................................................................... 12
Changes to Powering the Controller Section and Figure 27
Caption............................................................................................. 14
Change to Soft Start on Power-Up Section ................................. 15
Change to Figure 33 ....................................................................... 18
Changes to Table 7.......................................................................... 21
Added Table 8; Renumbered Sequentially .................................. 21
Updated Outline Dimensions ....................................................... 27
Changes to Ordering Guide .......................................................... 27
4/15—Revision 0: Initial Version
Data Sheet
TEC Voltage/Current Monitor ................................................. 16
Maximum TEC Voltage Limit .................................................. 16
Maximum TEC Current Limit ................................................. 17
Applications Information .............................................................. 18
Signal Flow .................................................................................. 18
Thermistor Setup........................................................................ 18
Thermistor Amplifier (Chopper 1).......................................... 19
PID Compensation Amplifier (Chopper 2)............................ 19
MOSFET Driver Amplifiers...................................................... 20
PWM Output Filter Requirements .......................................... 20
Input Capacitor Selection.......................................................... 21
Power Dissipation....................................................................... 21
PCB Layout Guidelines.................................................................. 23
Block Diagrams and Signal Flow ............................................. 23
Guidelines for Reducing Noise and Minimizing Power Loss.....23
Example PCB Layout Using Two Layers ................................. 24
Outline Dimensions ....................................................................... 27
Ordering Guide .......................................................................... 27
Rev. A | Page 2 of 27

3 Page

ADN8834 pdf
Data Sheet
Parameter
TEC CURRENT MEASUREMENT (WLCSP)
Current Sense Gain
Symbol
RCS
Current Measurement Accuracy
ILDR_ERROR
ITEC Voltage Accuracy
TEC CURRENT MEASUREMENT (LFCSP)
Current Sense Gain
VITEC_@_700_mA
VITEC_@_−700_mA
VITEC_@_800_mA
VITEC_@_−800_mA
RCS
Current Measurement Accuracy
ILDR_ERROR
ITEC Voltage Accuracy
VITEC_@_700_mA
VITEC_@_−700_mA
VITEC_@_800_mA
VITEC_@_−800_mA
ITEC Voltage Output Range
VITEC
ITEC Bias Voltage
Maximum ITEC Output Current
TEC VOLTAGE MEASUREMENT
Voltage Sense Gain
Voltage Measurement Accuracy
VITEC
IITEC
AVTEC
VVTEC_@_1_V
VTEC Output Voltage Range
VTEC Bias Voltage
Maximum VTEC Output Current
TEMPERATURE GOOD (LFCSP Only)
TMPGD Low Output Voltage
TMPGD High Output Voltage
TMPGD Output Low Impedance
TMPGD Output High Impedance
High Threshold
Low Threshold
INTERNAL SOFT START
Soft Start Time
VLIM/SD SHUTDOWN
VLIM/SD Low Voltage Threshold
THERMAL SHUTDOWN
Thermal Shutdown Threshold
Thermal Shutdown Hysteresis
VVTEC
VVTEC_B
RVTEC
VTMPGD_LO
VTMPGD_HO
RTMPGD_LOW
RTMPGD_LOW
VOUT1_THH
VOUT1_THL
tSS
VVLIM/SD_THL
TSHDN_TH
TSHDN_HYS
1 This specification is guaranteed by design.
2 This specification is guaranteed by characterization.
Test Conditions/Comments
Min
VPVIN = 3.3 V
VPVIN = 5 V
700 mA ≤ ILDR ≤ 1.5 A, VPVIN = 3.3 V
800 mA ≤ ILDR ≤ 1.5 A, VPVIN = 5 V
VPVIN = 3.3 V, cooling, VVREF/2 +
ILDR × RCS
VPVIN = 3.3 V, heating, VVREF/2 −
ILDR × RCS
VPVIN = 5 V, cooling, VVREF/2 + ILDR × RCS
VPVIN = 5 V, heating, VVREF/2 − ILDR × RCS
−10
−10
1.597
0.846
1.657
0.783
VPVIN = 3.3 V
VPVIN = 5 V
700 mA ≤ ILDR ≤ 1 A, VPVIN = 3.3 V
800 mA ≤ ILDR ≤ 1 A, VPVIN = 5 V
VPVIN = 3.3 V, cooling, VVREF/2 + ILDR ×
RCS
VPVIN = 3.3 V, heating, VVREF/2 − ILDR ×
RCS
VPVIN = 5 V, cooling, VVREF/2 + ILDR ×
RCS
VPVIN = 5 V, heating, VVREF/2 − ILDR ×
RCS
ITEC = 0 A
−15
−15
1.374
0.750
1.419
0.705
0
ILDR = 0 A
1.210
−2
VLDR – VSFB = 1 V, VVREF/2 + AVTEC ×
(VLDR – VSFB)
VLDR = VSFB
0.24
1.475
0.005
1.225
−2
No load
No load
2.0
IN2N tied to OUT2, VIN2P = 1.5 V
IN2N tied to OUT2, VIN2P = 1.5 V
1.40
Typ
0.525
0.535
1.618
0.883
1.678
0.822
0.525
0.525
1.618
0.883
1.678
0.830
1.250
0.25
1.50
1.250
25
50
1.54
1.46
150
170
17
ADN8834
Max Unit
+10
+10
1.649
0.891
1.718
0.836
V/A
V/A
%
%
V
V
V
V
+15
+15
1.861
1.015
1.921
0.955
VVREF
0.05
1.285
+2
V/A
V/A
%
%
V
V
V
V
V
V
mA
0.26
1.525
2.625
1.285
+2
V/V
V
V
V
mA
0.4 V
V
1.56 V
V
ms
0.07 V
°C
°C
Rev. A | Page 5 of 27

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