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PDF ADN8833 Fiche technique ( Data sheet )

Numéro de référence ADN8833
Description 1A Thermoelectric Cooler (TEC) Driver
Fabricant Analog Devices 
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ADN8833 Datasheet, Description
Data Sheet
Ultracompact, 1 A Thermoelectric Cooler
(TEC) Driver for Digital Control Systems
ADN8833
FEATURES
Patented high efficiency single inductor architecture
Integrated low RDSON MOSFETs for TEC driver
TEC voltage and current operation monitoring
No external sense resistor required
Independent TEC heating and cooling current limit settings
Programmable maximum TEC voltage
2 MHz PWM driver switching frequency
External synchronization
Digital thermal control loop compatible
2.50 V reference output with 1% accuracy
Available in a 25-ball, 2.5 mm × 2.5 mm WLCSP or in a
24-lead, 4 mm × 4 mm LFCSP
APPLICATIONS
TEC temperature control
Optical modules
Optical fiber amplifiers
Optical networking systems
Instruments requiring TEC temperature control
VLIM/SD
ILIM
FUNCTIONAL BLOCK DIAGRAM
VTEC
ITEC
VDD
TEC CURRENT
AND VOLTAGE
SENSE AND LIMIT
ADN8833
LINEAR
POWER
STAGE
LDR
CONT
CONTROLLER
PWM
POWER
STAGE
PVIN
SW
VOLTAGE
REFERENCE
OSCILLATOR
AGND VREF
SFB
EN/SY
Figure 1.
PGNDx
GENERAL DESCRIPTION
The ADN8833 is a monolithic H-bridge TEC driver with
integrated 1 A power MOSFETs. It has a linear power stage with
the linear driver (LDR) output and a pulse-width modulation
(PWM) power stage with the SW output. Depending on the
control voltage at the CONT input, the ADN8833 drives current
through a TEC to settle the temperature of a laser diode or a passive
component attached to the TEC module to the programmed
target temperature.
The control voltage applied to the CONT input is generated by a
digital-to-analog converter (DAC) closing the digital proportional,
integral, derivative (PID) loop of temperature control system.
The internal 2.5 V reference voltage provides a 1% accurate
output that is used to bias a voltage divider network to program the
maximum TEC current and voltage limits for both the heating
and cooling modes. It can also be a reference voltage for the DAC
and the temperature sensing circuit, including a thermistor bridge
and an analog-to-digital converter (ADC).
Table 1. TEC Family Models
Model
MOSFET Thermal Loop
ADN8831 Discrete Digital/analog
ADN8833 Integrated Digital
ADN8834 Integrated Digital/analog
Package
LFCSP (CP-32-7)
WLCSP (CB-25-7),
LFCSP (CP-24-15)
WLCSP (CB-25-7),
LFCSP (CP-24-15)
Rev. A
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
©2015 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
ADN8833 Fiche technique
ADN8833
TABLE OF CONTENTS
Features .............................................................................................. 1 
Applications....................................................................................... 1 
Functional Block Diagram .............................................................. 1 
General Description ......................................................................... 1 
Revision History ............................................................................... 2 
Specifications..................................................................................... 3 
Absolute Maximum Ratings............................................................ 6 
Thermal Resistance ...................................................................... 6 
ESD Caution.................................................................................. 6 
Pin Configurations and Function Descriptions ........................... 7 
Typical Performance Characteristics ............................................. 8 
Detailed Functional Block Diagram ............................................ 12 
Theory of Operation ...................................................................... 13 
Digital PID Control.................................................................... 13 
Powering the Driver ................................................................... 13 
Enable and Shutdown ................................................................ 14 
Oscillator Clock Frequency....................................................... 14 
Soft Start on Power-Up .............................................................. 14 
REVISION HISTORY
8/15—Rev. 0 to Rev. A
Added 24-Lead LFCSP.......................................................Universal
Changes to Features Section and Table 1 ...................................... 1
Changes to Table 2............................................................................ 3
Changes to Table 3............................................................................ 6
Added Figure 3; Renumbered Sequentially ................................. 7
Changes to Figure 11........................................................................ 9
Changes to Figure 18 and Figure 19............................................. 10
Changes to Figure 23...................................................................... 12
Changes to Powering the Driver Section and Figure 24 Caption...13
Change to Soft Start on Power-Up Section ................................. 14
Changes to Table 7.......................................................................... 17
Added Table 8; Renumbered Sequentially .................................. 18
Updated Outline Dimensions ....................................................... 23
Changes to Ordering Guide ......................................................... 23
4/15—Revision 0: Initial Version
Data Sheet
TEC Voltage/Current Monitor ................................................. 15 
Maximum TEC Voltage Limit .................................................. 15 
Maximum TEC Current Limit ................................................. 15 
Applications Information .............................................................. 16 
Typical Application with Digital PID Using a DAC .............. 16 
Thermistor Setup........................................................................ 16 
MOSFET Driver Amplifiers...................................................... 16 
PWM Output Filter Requirements .......................................... 17 
Input Capacitor Selection.......................................................... 18 
Power Dissipation....................................................................... 18 
PCB Layout Guidelines.................................................................. 20 
Block Diagrams and Signal Flow ............................................. 20 
Guidelines for Reducing Noise and Minimizing Power Loss20 
Example PCB Layout Using Two Layers ................................. 21 
Outline Dimensions ....................................................................... 23 
Ordering Guide .......................................................................... 23 
Rev. A | Page 2 of 23

3 Page

ADN8833 pdf
Data Sheet
Parameter
TEC CURRENT MEASUREMENT (LFCSP)
Current Sense Gain
Current Measurement Accuracy
ITEC Voltage Accuracy
ITEC Voltage Output Range
ITEC Bias Voltage
Maximum ITEC Output Current
TEC VOLTAGE MEASUREMENT
Voltage Sense Gain
Voltage Measurement Accuracy
VTEC Output Voltage Range
VTEC Bias Voltage
Maximum VTEC Output Current
INTERNAL SOFT START
Soft Start Time
VLIM/SD SHUTDOWN
VLIM/SD Low Voltage Threshold
THERMAL SHUTDOWN
Thermal Shutdown Threshold
Thermal Shutdown Hysteresis
Symbol
Test Conditions/Comments
Min Typ
RCS
ILDR_ERROR
VITEC_@_700_mA
VITEC_@_−700_mA
VITEC_@_800_mA
VITEC_@_−800_mA
VITEC
VITEC
IITEC
VPVIN = 3.3 V
VPVIN = 5 V
700 mA ≤ ILDR ≤ 1 A, VPVIN = 3.3 V
800 mA ≤ ILDR ≤ 1 A, VPVIN = 5 V
VPVIN = 3.3 V, cooling, VVREF/2 + ILDR × RCS
VPVIN = 3.3 V, heating, VVREF/2 − ILDR × RCS
VPVIN = 5 V, cooling, VVREF/2 + ILDR × RCS
VPVIN = 5 V, heating, VVREF/2 − ILDR × RCS
ITEC = 0 A
ILDR = 0 A
−15
−15
1.374
0.750
1.419
0.705
0
1.225
−2
0.525
0.525
1.618
0.883
1.678
0.830
1.250
AVTEC
VVTEC_@_1_V
VVTEC
VVTEC_B
RVTEC
VLDR − VSFB = 1 V, VVREF/2 + AVTEC ×
(VLDR − VSFB)
VLDR = VSFB
0.24 0.25
1.475 1.50
0.005
1.225
−2
1.250
tSS 150
VVLIM/SD_THL
TSHDN_TH
TSHDN_HYS
170
17
1 This specification is guaranteed by design.
2 This specification is guaranteed by characterization.
ADN8833
Max Unit
+15
+15
1.861
1.015
1.921
0.955
VVREF − 0.05
1.285
+2
V/A
V/A
%
%
V
V
V
V
V
V
mA
0.26
1.525
2.625
1.285
+2
V/V
V
V
V
mA
ms
0.07 V
°C
°C
Rev. A | Page 5 of 23

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