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PDF 74LVC2G00 Fiche technique - Diodes

Numéro de référence 74LVC2G00
Description DUAL 2-INPUT NAND GATE
Fabricant Diodes 
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74LVC2G00 Datasheet, Description
74LVC2G00
DUAL 2-INPUT NAND GATE
Description
Pin Assignments
The 74LVC2G00 is a dual, two input NAND gate. Both gates have
push-pull outputs designed for operation over a power supply range
of 1.65V to 5.5V. The device is fully specified for partial power down
applications using IOFF. The IOFF circuitry disables the output,
preventing damaging current backflow when the device is powered
down. Each gate performs the positive Boolean function:
Y A B or Y A B
(Top View)
1A 1
8 VCC
1B 2
7 1Y
2Y 3
6 2B
GND 4
5 2A
Features
Wide Supply Voltage Range from 1.65 to 5.5V
± 24mA Output Drive at 3.3V
CMOS Low Power Consumption
IOFF Supports Partial-Power-Down Mode Operation
Inputs accept up to 5.5V
Schmitt Trigger Action at all inputs makes the circuit tolerant
for slower input rise and fall times. The hysteresis is typically
100mV at VCC = 3.0V.
ESD Protection Exceeds JESD 22
2000-V Human Body Model (A114)
Exceeds 1000-V Charged Device Model (C101)
Latch-Up Exceeds 100mA per JESD 78, Class I
Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2)
Halogen and Antimony Free. “Green” Device (Note 3)
Applications
X2-DFN2010-8
X2-DFN1410-8
X2-DFN1210-8
Voltage Level Shifting
General Purpose Logic
Power Down Signal Isolation
Wide Array of Products Such as:
PCs, Networking, Notebooks, Netbooks, PDAs
Tablet Computers, E-readers
Computer Peripherals, Hard Drives, CD/DVD ROMs
TVs, DVDs, DVRs, Set Top Boxes
Cell Phones, Personal Navigation / GPS
MP3 Players, Cameras, Video Recorders
Notes:
1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS) & 2011/65/EU (RoHS 2) compliant.
2. See http://www.diodes.com/quality/lead_free.html for more information about Diodes Incorporated’s definitions of Halogen- and
Antimony-free, "Green" and Lead-free.
3. Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total
Br + Cl) and <1000ppm antimony compounds.
74LVC2G00
Document number: DS37926 Rev 1 - 2
1 of 11
www.diodes.com
June 2016
© Diodes Incorporated
74LVC2G00 Fiche technique
74LVC2G00
Absolute Maximum Ratings (Notes 7 & 8)
Symbol
Description
Rating
Unit
ESD HBM
ESD CDM
Human Body Model ESD Protection
Charged Device Model ESD Protection
2 kV
1 kV
VCC Supply Voltage
VI Input Voltage
Output Voltage -Active Mode
VO
Output Voltage Power Down Mode
-0.5 to +6.5
-0.5 to +6.5
-0.5 to VCC +0.5
-0.5 to +6.5
V
V
V
V
IIK
IOK
IO
ICC
IGND
TJ
TSTG
Input Clamp Current VI<0
Output Clamp Current (VO < 0 OR VO > Vcc )
Continuous Output Current (VO = 0 to VCC)
Continuous Current Through VCC
Continuous Current Through GND
Operating Junction Temperature
Storage Temperature
-50
±50
±50
100
-100
-40 to +150
-65 to +150
mA
mA
mA
mA
mA
°C
°C
Notes:
7. Stresses beyond the absolute maximum may result in immediate failure or reduced reliability. These are stress values and device
operation should be within recommend values.
8. Forcing the maximum allowed voltage could cause a condition exceeding the maximum current or conversely forcing the maximum current could
cause a condition exceeding the maximum voltage. The ratings of both current and voltage must be maintained within the controlled range.
Recommended Operating Conditions (Note 9)
Symbol
VCC Operating Voltage
Parameter
Operating
Data Retention Only
VI Input Voltage
Output Voltage Active Mode
VO Output Voltage Power-Down Mode
VCC = 1.65V
VCC = 2.3V
IOH High-Level Output Current
VCC = 2.7V
VCC = 3.0V
IOL Low-Level Output Current
VCC = 4.5V
VCC = 1.65V
VCC = 2.3V
VCC = 2.7V
VCC = 3.0V
Δt/ΔV
TA
VCC = 4.5V
Input Transition Rise or Fall Rate
VCC = 1.65V to 2.7V
VCC = 2.7V to 5.5V
Operating Free-Air Temperature
Note:
9. Unused inputs should be held at VCC or Ground.
Min Max Unit
1.65
1.5
5.5
V
0 5.5 V
0 VCC V
0 5.5
-4
-8
-12
mA
-16
-24
-32
4
8
12
mA
16
24
32
20
ns/V
10
-40 +125 °C
74LVC2G00
Document number: DS37926 Rev 1 - 2
3 of 11
www.diodes.com
June 2016
© Diodes Incorporated

3 Page

74LVC2G00 pdf
Parameter Measurement Information
From Output
Under Test
CL
(see Note A)
RL
74LVC2G00
VCC
1.8V ± 0.15V
2.5V ± 0.2V
2.7V
3.3V ± 0.3V
5.0V ± 0.5V
VI
VCC
VCC
2.7V
2.7V
VCC
Inputs
tr/tf
≤2ns
≤2ns
≤2.5ns
≤2.5ns
≤2.5ns
VM
VCC/2
VCC/2
1.5V
1.5V
VCC/2
CL
30pF
30pF
50pF
50pF
50pF
RL
1kΩ
500Ω
500Ω
500Ω
500Ω
tW
Input
VM
VM
Voltage Waveform Pulse Duration
Vl
0V
Input
tPLH
Output
VM
VM
Vl
VM
0V
tPHL
VM
VOH
VOL
tPHL
tPLH
VOH
Output
VM VM
VOL
Voltage Waveform Propagation Delay Times
Inverting and Non Inverting Outputs
Figure 1. Load Circuit and Voltage Waveforms
Notes:
A. Includes test lead and test apparatus capacitance.
B. All pulses are supplied at pulse repetition rate ≤ 10MHz.
C. Inputs are measured separately one transition per measurement.
D. tPLH and tPHL are the same as tpd.
74LVC2G00
Document number: DS37926 Rev 1 - 2
6 of 11
www.diodes.com
June 2016
© Diodes Incorporated

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