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MX29LV161DT Datasheet PDF - Macronix International


FLASH MEMORY

Numéro de référence MX29LV161DT
Description FLASH MEMORY
Fabricant Macronix International 
Logo Macronix International Logo 
avant-première
30 Pages
		
MX29LV161DT Datasheet

1 Page

MX29LV161DT Fiche technique
ADVANCED INFORMATION
MX29LV161D T/B
SECTOR ERASE ....................................................................................................................................... 22
SECTOR ERASE SUSPEND ..................................................................................................................... 23
CHIP ERASE ............................................................................................................................................ 23
AUTOMATIC SELECT COMMAND SEQUENCE ........................................................................................ 24
SECTOR ERASE RESUME ....................................................................................................................... 24
AUTOMATIC SELECT OPERATIONS ........................................................................................................ 24
READ MANUFACTURER ID OR DEVICE ID ............................................................................................. 25
VERIFY SECTOR PROTECTION .............................................................................................................. 25
RESET ...................................................................................................................................................... 25
COMMON FLASH MEMORY INTERFACE (CFI) MODE ...................................................................................... 26
QUERY COMMAND AND COMMON FLASH INTERFACE (CFI) MODE .................................................... 26
Table 4-1. CFI mode: Identification Data Values .......................................................................................... 26
Table 4-2. CFI Mode: System Interface Data Values ................................................................................... 26
Table 4-3. CFI Mode: Device Geometry Data Values ................................................................................... 27
Table 4-4. CFI Mode: Primary Vendor-Specific Extended Query Data Values ............................................... 28
ELECTRICAL CHARACTERISTICS .................................................................................................................... 29
ABSOLUTE MAXIMUM STRESS RATINGS .............................................................................................. 29
OPERATING TEMPERATURE AND VOLTAGE .......................................................................................... 29
DC CHARACTERISTICS ........................................................................................................................... 30
SWITCHING TEST WAVEFORM .............................................................................................................. 31
SWITCHING TEST CIRCUIT ..................................................................................................................... 31
AC CHARACTERISTICS ........................................................................................................................... 32
WRITE COMMAND OPERATION ........................................................................................................................ 33
Figure 1. COMMAND WRITE OPERATION ................................................................................................ 33
READ/RESET OPERATION ................................................................................................................................ 34
Figure 2. READ TIMING WAVEFORM ........................................................................................................ 34
Figure 3. RESET# TIMING WAVEFORM ................................................................................................... 35
ERASE/PROGRAM OPERATION ........................................................................................................................ 36
Figure 4. AUTOMATIC CHIP ERASE TIMING WAVEFORM ....................................................................... 36
Figure 5. AUTOMATIC CHIP ERASE ALGORITHM FLOWCHART ............................................................. 37
Figure 6. AUTOMATIC SECTOR ERASE TIMING WAVEFORM .................................................................. 38
Figure 7. AUTOMATIC SECTOR ERASE ALGORITHM FLOWCHART ...................................................... 39
Figure 8. ERASE SUSPEND/RESUME FLOWCHART ............................................................................... 40
Figure 10. ACCELERATED PROGRAM TIMING DIAGRAM ...................................................................... 41
Figure 9. AUTOMATIC PROGRAM TIMING WAVEFORM ........................................................................... 41
Figure 11. CE# CONTROLLED WRITE TIMING WAVEFORM ..................................................................... 42
P/N:PM1359
REV. 0.09, JUL. 29, 2008
3

3 Page

MX29LV161DT pdf
ADVANCED INFORMATION
MX29LV161D T/B
GENERAL DESCRIPTION
MX29LV161DT/B is a 16Mbit flash memory that can be organized as 1,048,576 words.These devices operate over a
voltage range of 2.7V to 3.6V typically using a 3V power supply input. The memory array is divided into 32 equal 64
Kilo byte blocks. However, depending on the device being used as a Top-Boot or Bottom-Boot device. The outermost
two sectors at the top or at the bottom are respectively the boot blocks for this device.
The MX29LV161DT/B is offered in a 48-pin TSOP, 48-ball XFLGA/WFBGA and a 48-ball CSP(TFBGA) JEDEC
standard package. These packages are offered lead-free versions that are compliant to the RoHS specifications. The
software algorithm used for this device also adheres to the JEDEC standard for single power supply devices. These
flash parts can be programmed in system or on commercially available EPROM/Flash programmers.
Separate OE# and CE# (Output Enable and Chip Enable) signals are provided to simplify system design. When used
with high speed processors, the 90ns read access time of this flash memory permits operation with minimal time lost
due to system timing delays.
The automatic write algorithm provided on Macronix flash memories perform an automatic erase prior to write.The user
only needs to provide a write command to the command register.The on-chip state machine automatically controls the
program and erase functions including all necessary internal timings. Since erase and write operations take much
longer time than read operations, erase/write can be interrupted to perform read operations in other sectors of the
device. For this, Erase Suspend operation along with Erase Resume operation are provided. Data# polling or Toggle bits
are used to indicate the end of the erase/write operation.
These devices are manufactured at the Macronix fabrication facility using the time tested and proven MXIC's advance
technology. This proprietary non-epi process provides a very high degree of latch-up protection for stresses up to 100
milliamperes on address and data pins from -1V to 1.5xVCC.
With low power consumption and enhanced hardware and software features, this flash memory retains data reliably for
at least ten years. Erase and programming functions have been tested to meet a typical specification of 100,000
cycles of operation.
P/N:PM1359
REV. 0.09, JUL. 29, 2008
6

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