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MX29LV160DB Datasheet PDF - Macronix International


FLASH MEMORY

Numéro de référence MX29LV160DB
Description FLASH MEMORY
Fabricant Macronix International 
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MX29LV160DB Datasheet
MX29LV160DB Fiche technique
MX29LV160D T/B
READ MANUFACTURER ID OR DEVICE ID.............................................................................................. 25
VERIFY SECTOR GROUP PROTECTION................................................................................................. 25
RESET ........................................................................................................................................................ 25
COMMON FLASH MEMORY INTERFACE (CFI) MODE...................................................................................... 26
QUERY COMMAND AND COMMON FLASH INTERFACE (CFI) MODE................................................... 26
Table 4-1. CFI mode: Identification Data Values.......................................................................................... 26
Table 4-2. CFI Mode: System Interface Data Values................................................................................... 26
Table 4-3. CFI Mode: Device Geometry Data Values.................................................................................. 27
Table 4-4. CFI Mode: Primary Vendor-Specific Extended Query Data Values............................................ 28
ELECTRICAL CHARACTERISTICS..................................................................................................................... 29
ABSOLUTE MAXIMUM STRESS RATINGS............................................................................................... 29
OPERATING TEMPERATURE AND VOLTAGE.......................................................................................... 29
DC CHARACTERISTICS............................................................................................................................. 30
SWITCHING TEST CIRCUIT....................................................................................................................... 31
SWITCHING TEST WAVEFORM............................................................................................................... 31
AC CHARACTERISTICS............................................................................................................................. 32
WRITE COMMAND OPERATION......................................................................................................................... 33
Figure 1. COMMAND WRITE OPERATION................................................................................................ 33
READ/RESET OPERATION.................................................................................................................................. 34
Figure 2. READ TIMING WAVEFORM........................................................................................................ 34
Figure 3. RESET# TIMING WAVEFORM................................................................................................... 35
ERASE/PROGRAM OPERATION......................................................................................................................... 36
Figure 4. AUTOMATIC CHIP ERASE TIMING WAVEFORM....................................................................... 36
Figure 5. AUTOMATIC CHIP ERASE ALGORITHM FLOWCHART............................................................ 37
Figure 6. AUTOMATIC SECTOR ERASE TIMING WAVEFORM................................................................. 38
Figure 7. AUTOMATIC SECTOR ERASE ALGORITHM FLOWCHART..................................................... 39
Figure 8. ERASE SUSPEND/RESUME FLOWCHART............................................................................... 40
Figure 9. AUTOMATIC PROGRAM TIMING WAVEFORM.......................................................................... 41
Figure 10. ACCELERATED PROGRAM TIMING DIAGRAM...................................................................... 41
Figure 11. CE# CONTROLLED WRITE TIMING WAVEFORM................................................................... 42
Figure 12. AUTOMATIC PROGRAMMING ALGORITHM FLOWCHART.................................................... 43
SECTOR PROTECT/CHIP UNPROTECT............................................................................................................. 44
Figure 13. SECTOR PROTECT/CHIP UNPROTECT WAVEFORM (RESET# Control).............................. 44
Figure 14. IN-SYSTEM SECTOR PROTECT WITH RESET#=Vhv............................................................. 45
Figure 15. CHIP UNPROTECT ALGORITHMS WITH RESET#=Vhv.......................................................... 46
Table 5. TEMPORARY SECTOR UNPROTECT......................................................................................... 47
Figure 16. TEMPORARY SECTOR UNPROTECT WAVEFORM................................................................ 47
Figure 17. TEMPORARY SECTOR UNPROTECT FLOWCHART.............................................................. 48
Figure 18. SILICON ID READ TIMING WAVEFORM.................................................................................. 49
WRITE OPERATION STATUS............................................................................................................................... 50
Figure 19. DATA# POLLING TIMING WAVEFORM (DURING AUTOMATIC ALGORITHM)....................... 50
Figure 20. DATA# POLLING ALGORITHM.................................................................................................. 51
P/N:PM1315
REV. 1.1, MAY 18, 2009
3
MX29LV160DB pdf
MX29LV160D T/B
GENERAL DESCRIPTION
MX29LV160DT/B is a 16Mbit flash memory that can be organized as 2Mbytes of 8 bits each or as 1Mwords of 16
bits each. These devices operate over a voltage range of 2.7V to 3.6V typically using a 3V power supply input.
The memory array is divided into 32 equal 64 Kilo byte blocks. However, depending on the device being used as
a Top-Boot or Bottom-Boot device. The outermost one sector at the top or at the bottom are respectively the boot
blocks for this device.
The MX29LV160DT/B is offered in a 48-pin TSOP, 48-ball XFLGA/WFBGA and a 48-ball CSP(TFBGA) JEDEC
standard package. These packages are offered in leaded, as well as lead-free versions that are compliant to the
RoHS specifications. The software algorithm used for this device also adheres to the JEDEC standard for single
power supply devices. These flash parts can be programmed in system or on commercially available EPROM/
Flash programmers.
Separate OE# and CE# (Output Enable and Chip Enable) signals are provided to simplify system design. When
used with high speed processors, the 70ns read access time of this flash memory permits operation with minimal
time lost due to system timing delays.
The automatic write algorithm provided on Macronix flash memories perform an automatic erase prior to write.
The user only needs to provide a write command to the command register. The on-chip state machine automati-
cally controls the program and erase functions including all necessary internal timings. Since erase and write
operations take much longer time than read operations, erase/write can be interrupted to perform read opera-
tions in other sectors of the device. For this, Erase Suspend operation along with Erase Resume operation are
provided. Data# polling or Toggle bits are used to indicate the end of the erase/write operation.
These devices are manufactured at the Macronix fabrication facility using the time tested and proven Macronix's
advance technology. This proprietary non-epi process provides a very high degree of latch-up protection for
stresses up to 100 milliamperes on address and data pins from -1V to 1.5xVCC.
With low power consumption and enhanced hardware and software features, this flash memory retains data reli-
ably for at least twenty years. Erase and programming functions have been tested to meet a typical specification
of 100,000 cycles of operation.
P/N:PM1315
REV. 1.1, MAY 18, 2009
6





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