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RK3026 Datasheet PDF - Rockchip


High Performance and Low-power Pocesor

Numéro de référence RK3026
Description High Performance and Low-power Pocesor
Fabricant Rockchip 
Logo Rockchip Logo 
avant-première
15 Pages
		
RK3026 Datasheet

1 Page

RK3026 Fiche technique
BRIEF
RK3026
Content
Content................................................................................................................................................................- 3 -
chapter 1 Introduction......................................................................................................................- 5 -
1.1 Overview.....................................................................................................................................- 5 -
1.2 Features...................................................................................................................................... - 5 -
1.3 Block Diagram..........................................................................................................................- 15 -
High Performance and Low-power Processor for Digital Media Application
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3 Page

RK3026 pdf
1.2.2 Memory Organization
BRIEF
RK3026
Internal on-chip memory
16KB BootRom
8KB internal SRAM
External off-chip memory
DDR3-1066, 16bits data width, 2 ranks, 1GB(max) address space per rank
LVDDR3-1066, 16bits data width, 2 ranks, 1GB(max) address space per rank
Async/ Sync Toggle/ Sync ONFI Nand Flash(include LBA Nand), 8bits data width, 4
banks
1.2.3 Internal Memory
Internal BootRom
Size : 16KB
Support system boot from the following device :
8bits Async Nand Flash
SPI interface
eMMC interface
SDMMC interface
Support system code download by the following interface:
USB OTG
UART1
Internal SRAM
Size : 8KB
1.2.4 External Memory or Storage device
Dynamic Memory Interface (DDR3/LVDDR3)
Compatible with JEDEC standard DDR3/ LVDDR3 SDRAM
Data rates of up to 1066Mbps(533MHz) for DDR3/LVDDR3
Support up to 2 ranks (chip selects), maximum 1GB address space per rank
Advanced command reordering and scheduling to maximize bus utilization
Low power modes, such as power-down and self-refresh for DDR3/ LVDDR3
SDRAM;
Compensation for board delays and variable latencies through programmable
pipelines
Programmable output and ODT impedance with dynamic PVT compensation
Nand Flash Interface
Support 8bits async/toggle/syncnandflash, up to 4 banks
Support LBA nandflash
16bits, 24bits, 40bits, 60bits hardware ECC
For DDR nandflash, support DLL bypass and 1/4 or 1/8 clock adjust, maximum
clock rate is 66.5MHz
For async/togglenandflash, support configurable interface timing , maximum data
rate is 16bit/cycle
Embedded AHB master interface to do data transfer by DMA method
Also support data transfer by AHB slave interface together with external DMAC
eMMC Interface
Compatible with standard iNAND interface
Support MMC4.41 protocol
Provide eMMC boot sequence to receive boot data from external eMMC device
Support combined single FIFO(32x32bits) for both transmit and receive operations
Support FIFO over-run and under-run prevention by stopping card clock
automatically
Support CRC generation and error detection
High Performance and Low-power Processor for Digital Media Application
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Un datasheet est un document fourni par le constructeur du composant, où figurent toutes les données techniques sur le produit: puissance dissipée, courant maximal, tension de seuil, tension de claquage, température de stockage, etc. Ils sont en général fournis gratuitement, et se présentent très régulièrement sous la forme d'un document pdf.


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